Austin, Texas

Summary

Posted: Oct 26, 2020
Role Number:200201405
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for an exceptionally talented design verification engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. This role is for a DV engineer who will enable us to produce fully functional first silicon for Analog/Digital mixed-signal designs. The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.

Key Qualifications

Key Qualifications
  • Advanced knowledge of SystemVerilog and UVM
  • Experience developing scalable and portable test-benches
  • Experience with verification methodologies and tools such as simulators, waveform viewers, build/run automation, coverage collection, gate level simulations
  • Experience with serial protocols such as PCIe or USB
  • Experience with mixed signal verification methodology for IPs such as PHYs, PLLs etc.
  • In lieu of UVM knowledge, C/C++ experienced level knowledge
  • Excellent knowledge of one of the scripting languages: Python, Perl, TCL
  • Proven knowledge of formal verification methodology

Description

Description
In this role, you will be responsible for ensuring bug-free first silicon for part of the SoC / IP and are expected to: Develop detailed test and coverage plans based on the micro-architecture Develop verification methodology suitable for the IP, ensuring a scalable and portable environment. Develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage. Develop verification plans for all features under your care. Execute verification plans, including design bring-up, DV environment bring-up, regression enabling all features under your care, and debug of the test failures. Develop block, IP and SoC level test-benches Track and report DV progress using a variety of metrics, including bugs and coverage. Develop mixed-signal simulation environment, and work closely with analog team to ensure overall bug-free mixed-signal design.

Education & Experience

Education & Experience
Masters Degree + 3 years of industrial experience Bachelors Degree + 5 years of industrial experience

Additional Requirements

Additional Requirements

Austin, Texas

We’re a diverse collective of thinkers and doers, continually reimagining what’s possible to help us all do what we love in new ways. The people who work here have reinvented entire industries with the Mac, iPhone, iPad, and Apple Watch, as well as with services, including Apple TV, the App Store, Apple Music, and Apple Pay. And the same innovation that goes into our products also applies to our practices — strengthening our commitment to leave the world better than we found it.

Every new product we invent, service we create, or store we open is the result of people working together to make each other’s ideas stronger. That happens here because every one of us strives toward a common goal — creating the best customer experiences. So bring your passion, courage, and original thinking and get ready to share it. This is where your work can make a difference in people’s lives. Including your own.